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About

Welcome! My name is Hanchen Ye (叶汉辰) and I'm a PhD candidate in the Department of Electrical and Computer Engineering (ECE) at University of Illinois at Urbana-Champaign (UIUC) advised by Prof. Deming Chen.

Before joining UIUC, I obtained my Bachelor's and Master's degree at Fudan University (复旦大学) in 2017 and 2019, respectively. During summers, I had spent time at Xilinx (2020), SiFive (2021), Intel (2022), and Google X (2023) as interns.

My research lies in the area of compilers, high-level synthesis (HLS), and hardware acceleration. Recently, I've been focused on HLS tools (ScaleHLS and XLS), domain-specific compilers (CIRCT and MLIR-AIE), and FPGA-based deep learning accelerators (HybridDNN and DNNExplorer).

Google Scholar / GitHub / LinkedIn / CV / Email

Education

logo University of Illinois at Urbana-Champaign, Urbana, IL
Ph.D. in Electrical and Computer Engineering Aug. 2019 - Present
Thesis Advisor: Prof. Deming Chen

logo Fudan University, Shanghai, China
M.E. in Integrated Circuit Engineering Sep. 2017 - Jun. 2019
B.E. in Microelectronic Science and Engineering Sep. 2013 - Jun. 2017

logo National University of Singapore, Singapore
Exchange Student in Electrical and Computer Engineering Aug. 2015 - Dec. 2015

Work Experiences

logo University of Illinois at Urbana-Champaign, Urbana, IL
Research Assistant (Part-time) in Electrical and Computer Engineering Aug. 2019 - Present
Advisor: Prof. Deming Chen
Teaching Assistant (Part-time) in ECE527 (System-On-Chip Design) Aug. 2023 - Dec. 2023
Teaching Assistant (Part-time) in ECE527 (System-On-Chip Design) Aug. 2022 - Dec. 2022

logo Inspirit IOT, Champaign, IL
Part-time Intern (Part-time) Jan. 2024 - Dec. 2024
Mentor: Prof. Deming Chen

logo Google, Mountain View, CA
Ph.D. Resident (Internship) in X, The Moonshot Factory May. 2023 - Aug. 2023
Mentor: Xiaoqing Xu, Prof. David Pan, Chris Leary

logo Intel, Portland, OR
Research Intern (Internship) in Strategic CAD Labs May. 2022 - Aug. 2022
Mentor: Jin Yang, Jeremy Casas, Zhenkun Yang

logo SiFive, San Mateo, CA
Compilers Intern (Internship) in Platform Engineering Department May. 2021 - Aug. 2021
Mentor: Andrew Lenharth

logo Xilinx (AMD), San Jose, CA
Compiler Intern (Internship) in Research Labs Jun. 2020 - Aug. 2020
Mentor: Stephen Neuendorffer

logo Fudan University, Shanghai, China
Research Assistant (Part-time) in State Key Laboratory of ASIC and System Sep. 2016 - Jun. 2019
Advisor: Prof. Gengsheng Chen

Awards and Scholarships

UIUC Dr. Ok Kyun Kim Fellowship Mar. 2024
UIUC Conference Presentation Awards Mar. 2024
SRC TECHCON First Place Best Student Presenter Award Sep. 2023
DAC Ph.D. Forum First Place Winner Jul. 2023
UIUC A.R. Buck Knight Fellowship Apr. 2023
AMD HACC Outstanding Researcher Awards Feb. 2023
UIUC Teachers Ranked as Excellent Dec. 2022
UIUC Rambus Computer Engineering Fellowship May. 2022
DAC Young Fellows Jun. 2020, Apr. 2022
Shanghai Outstanding Graduates Jun. 2019
Fudan University KLA-Tencor Scholarship Dec. 2018
Fudan University Outstanding Graduate Students Oct. 2018
The 2nd China College IC Competition Grand Prize Winner Aug. 2018
Fudan University Xi-Yuan Research Scholarship May. 2016
Fudan University Outstanding Undergraduate Students Dec. 2015

Selected Papers

[NeurIPS'24] SnapKV: LLM Knows What You are Looking for Before Generation
Yuhong Li*, Yingbing Huang*, Bowen Yang, Bharat Venkitesh, Acyr Locatelli, Hanchen Ye, Tianle Cai, Patrick Lewis, Deming Chen
The Conference on Neural Information Processing Systems (NeurIPS'24)
PDF / arXiv / GitHub

[DATE'24] Subgraph Extraction-based Feedback-guided Iterative Scheduling for HLS
Hanchen Ye, David Pan, Chris Leary, Deming Chen, Xiaoqing Xu
The Conference on Design, Automation & Test in Europe (DATE'24)
PDF / arXiv / GitHub / Poster / Slides / DOI

[ASPLOS'24] HIDA: A Hierarchical Dataflow Compiler for High-Level Synthesis
Hanchen Ye, Hyegang Jun, Deming Chen
The ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24)
PDF / arXiv / GitHub / Poster / Slides / Website / DOI

[FPGA'23] CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture
Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou
The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA'23)
PDF / arXiv / GitHub / DOI

[HPCA'22] ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation
Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen
The IEEE International Symposium on High-Performance Computer Architecture (HPCA'22)
PDF / arXiv / GitHub / Slides / Website / DOI

[DAC'20] HybridDNN: A Framework for High-Performance Hybrid DNN Accelerator Design and Implementation
Hanchen Ye, Xiaofan Zhang, Zhize Huang, Gengsheng Chen, Deming Chen
The ACM/IEEE Design Automation Conference (DAC'20)
PDF / arXiv / Slides / Video / DOI