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Hanchen Ye
PhD Candidate at UIUC

Welcome! My name is Hanchen Ye (叶汉辰) and I’m a PhD candidate in the Department of Electrical and Computer Engineering (ECE) at University of Illinois at Urbana-Champaign (UIUC) advised by Prof. Deming Chen.

Before joining UIUC, I obtained my Bachelor’s and Master’s degree at Fudan University (复旦大学) in 2017 and 2019, respectively. During summers, I had spent time at Xilinx (2020), SiFive (2021), and Intel (2022) as interns.

My research lies in the area of compilers, high-level synthesis (HLS), and hardware acceleration. Recently, I’ve been focused on HLS tools (ScaleHLS), domain-specific compilers (CIRCT and MLIR-AIE), and FPGA-based deep learning accelerators (HybridDNN and DNNExplorer).

Email / Google Scholar / GitHub / LinkedIn / Resume

news

Jul, 2022 Gave a talk on "Hardware Compilation with MLIR and CIRCT" for the Intel Strategic CAD Labs (SCL) Tech Presentation.
Jul, 2022 Gave a young fellow poster presentation on "PolyAIE: A Dataflow Compiler for Heterogeneous Compute Platforms" at DAC22.
May, 2022 Started research intern at Intel Strategic CAD Labs.
May, 2022 Received the ECE Rambus Fellowship.
Apr, 2022 Received the DAC'22 Young Fellowship.
Apr, 2022 Our paper on an enhanced version of ScaleHLS is invited to present at DAC'22.
Apr, 2022 Gave a presentation on ScaleHLS at HPCA'22.
Feb, 2022 Gave a talk on ScaleHLS for the Workshop on Open-Source Source-to-Source Transformation for High-Level Synthesis (HLS) at FPGA'22.
Jan, 2022 Served on the program committe of LATTE'22.
Dec, 2021 Gave a guest lecture on "Compilers for Domain-Specific Accelerators" for the ECE6100/CS6290 (Advanced Computer Architecture) course at Gatech.
Nov, 2021 Gave a talk on ScaleHLS for the CS Compiler Seminar at UIUC.
Nov, 2021 Gave a guest lecture on ScaleHLS for the ECE527 (System-on-Chip Design) course at UIUC.
Oct, 2021 Our paper on ScaleHLS is accepted by HPCA'22.
Aug, 2021 Gave a talk on ScaleHLS for the Xilinx XACC Tech Talk Series.
Aug, 2021 Gave a talk on "FSM (Finite-State Machine) Dialect in CIRCT" for the CIRCT Open Meeting.
Jun, 2021 Gave a talk (in Chinese) on "CIRCT: The Next-Generation Open-Source Hardware Compilation Framework based on MLIR" for the CCF EDA Forum.
May, 2021 Gave a talk on ScaleHLS for the HSC Seminar at UCSC.
May, 2021 Started compilers intern at SiFive Platform Engineering Department.
Apr, 2021 Gave a presentation on ScaleHLS at LATTE'21.
Mar, 2021 Our paper on Being-ahead is accepted by MLBench'21.
Mar, 2021 Our work-in-progess paper on ScaleHLS is accepted by LATTE'21.
Oct, 2020 Passed my PhD qualifying exam at UIUC.
Aug, 2020 Gave a talk (in Chinese) on "Handshake-based HLS in CIRCT" for the OSDT Online Meeting.
Aug, 2020 Gave a talk on "Handshake-based HLS in CIRCT" for the CIRCT Open Meeting.
Aug, 2020 Our paper on IDLA is accepted by ICSICT'20.
Jul, 2020 Gave a presentation on HybridDNN at DAC'20.
Jul, 2020 Our paper on DNNExplorer is accepted by ICCAD'20.
Jun, 2020 Received the DAC'20 Young Fellowship.
Jun, 2020 Started compiler intern at Xilinx Research Labs.
Feb, 2020 Our paper on HybridDNN is accepted by DAC'20.
Aug, 2019 Started my PhD studies advised by Prof. Deming Chen at UIUC.
Jun, 2019 Graduated from Fudan University as the "Shanghai Outstanding Graduates".
Dec, 2018 Received the KLA-Tencor Scholarship.
Nov, 2018 Gave a presentation on RS-Pipeline at ICSICT'18.
Oct, 2018 Honored the "Outstanding Students at Fudan University".
Aug, 2018 Our "Musketeers" team won the first place in the second China College IC Competition.
Aug, 2018 Our paper on RS-Pipeline is accepted by ICSICT'18.