'simulator' Submodule

• Introduction
•  ChildNode
•  DataflowNode
•  InternalNode
•  Kernel
  •  print_dot
  •  print_tracing
•  KernelNode
•  Node
•  ParentNode
•  PipelineNode

Introduction

from streamtensor import simulator

ChildNode(**kwargs)

Bases: Node

Abstract base for nodes that can have a parent

DataflowNode(op, clock, latency, interval, tripcount, depth)

Bases: ParentNode, ChildNode, InternalNode

Intermediate nodes that can have both parents and children

InternalNode(**kwargs)

Bases: Node

Abstract base for nodes that have inputs/outputs

Kernel(kernel_op)

print_dot(file_name, filter=lambda op: True)

Prints the design space as a DOT file.

Parameters:

Name	Type	Description	Default
file_name	str	The name of the DOT file.	required
filter	Callable[[TaskOp], bool]	A filter function to select nodes to print.	lambda op: True

print_tracing(file_name)

Prints a timeline visualization showing when each node is busy/idle.

Parameters:

Name	Type	Description	Default
file_name	str	Output filename for the timeline image.	required

KernelNode(op, clock, latency)

Bases: ParentNode

Root nodes with children but no parent or I/O

Node(op, clock, latency, interval, tripcount, depth, **kwargs)

Bases: ABC

Base class for all nodes with common properties

ParentNode(**kwargs)

Bases: Node

Abstract base for nodes that can have children

PipelineNode(op, clock, latency, interval, tripcount, depth)

Bases: ChildNode, InternalNode

Leaf nodes with inputs/outputs but no children