Publications

ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation. In HPCA'22, 2022.
ScaleHLS: Achieving Scalable High-Level Synthesis through MLIR. In LATTE'21, 2021.
DNNExplorer: A Framework for Modeling and Exploring a Novel Paradigm of FPGA-based DNN Accelerator. In ICCAD'20, 2020.
IDLA: An Instruction-based Adaptive CNN Accelerator. In ICSICT'20, 2020.
A Novel Pipeline Design Method Based on FPGA Dynamic Partial Reconfiguration Technology. In China Patent CN108228966A, 2017.