News: RS-Pipeline Paper Presented on ICSICT'18

Our paper “A Resource-Sharing & Pipelined Design Scheme for Dynamic Deployment of CNNs on FPGAs” was presented on ICSICT'18. This paper proposes a Dynamic Partial Reconfiguration (DPR) -based pipeline architecture, which can make large CNNs accelerators adapt to resource-limited FPGAs while maintaining a low overall latency.

Hanchen Ye
Hanchen Ye
PhD Student in UIUC

This dream will last forever.